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Re: Recent s.s.t.c. work



Original poster: "K. C. Herrick" <kchdlh@xxxxxxx>

To anyone giving any thought to this: I'm just seeing, with further perusal of the simulation, that a) I still have a phase-shift problem thru the loop (causing non-z.c. switching); but more to the immediate point, b) while the drive to the IGBT gate looks clean, there is a significant (simulation) oscillation occurring in the currents of Q2 and D8! A burst of several hundred mA peak, occupying most of every-other half-cycle (of the simulated spark-burst of cycles). Frequency, ~17 MHz. So...that may be what's happening in the hardware. I'll be trying to find out why that is, in the simulation first.

KCH

Tesla list wrote:
Original poster: "K. C. Herrick" <mailto:kchdlh@xxxxxxx><kchdlh@xxxxxxx>

Here's a bit of a puzzle; perhaps someone can offer a clue toward solving it. I post

<http://www.hot-streamer.com/temp/tch-drvr.jpg>http://www.hot-streamer.com/temp/tch-drvr.jpg

, the schematic of my IGBT driver. I briefly repeat how it is to work: Input excitation is present all the time, keeping C1 & C2 charged via R1, D1 & D2. Negative-polarity input signal, via D7, Q3 & R6, keeps the IGBT's gate at ~-27V (with R5 holding it there between half-cycles). Q1 is kept off between spark events by A1 being on.

During each burst of excitation to turn on the IGBT, A1 is turned off. R3 turns Q1 on during positive half-cycles of the input. D6 & Q1 pass the positive-going signal to Q2/Q3 and their output drives the IGBT, between ~+ and - 27V (perhaps ~26, with the Q2 & Q3 b-e drops).

I've incorporated D8 & D9 to soak up any voltage overshoot that might occur at the gates; one or the other is to conduct at an overshoot and clamp it to the voltage of C1 or C2. I would have expected neither D8 nor D9 normally to conduct.

Testing so far with no H.V. applied to the IGBTs, I see good IGBT-gate waveshapes: rise/fall of n.g.t. 200 ns, -27 to +27V. Smooth as can be with just the barest ringing top & bottom using a 100 MHz scope & probe. But here's the rub: With less than 10% duty cycle, on vs. off, Q2 >>and D8!<< rather quickly become hot. Why Q3 does not become at least equally as warm as Q2, and why D8 warms up >>at all<<, I cannot fathom. Anyone have a thought on it?

Ken Herrick

Tesla list wrote:
Original poster: "K. C. Herrick" <mailto:kchdlh@xxxxxxx><kchdlh@xxxxxxx>

Hello Steve-

No, I decided to do away with that, on the basis of an additional simulation. The simulation showed that I could get a proper phase shift--yielding the correct phase for feedback--by taking feedback from a 1-turn loop around the primary rather than from a current transformer. So that's what I've implemented. I still have the phase-shift assy and if this is a total failure I will resurrect that--provided that my energy for this Tesla stuff continues to hold out to a sufficient degree.

In the next day or so I'll bit the bullet & crank up the juice bit by bit. And I do have the camera handy! In fact, as I've mentioned before, I can now take scope photos with it. I just hope there'll be some good photos to take.

Ken

Tesla list wrote:
Original poster: "Steve Ward" <mailto:steve.ward@xxxxxxxxx><steve.ward@xxxxxxxxx>

Hi Ken,

Will you be employing your delay register on this next attempt to try
and compensate for delays?  I hope that works as expected.  Be sure to
have a camera handy to take pictures of the sparks!

Good luck, let us know how it turns out.

Steve

On 3/24/06, Tesla list <mailto:tesla@xxxxxxxxxx><tesla@xxxxxxxxxx> wrote:
> Original poster: "K. C. Herrick" <mailto:kchdlh@xxxxxxx><kchdlh@xxxxxxx>
>
> I see that my last posting on this topic was in December.  In the
> interim I've been slothful to a fault (altho happily busy for 3 of
> the weeks entertaining our Most Perfect Granddaughter, 2 1/2,
> visiting from Berlin).  But I have now gotten to the stage where I'm
> ready to put the H.V. to it once again.  I've checked the gate
> waveforms & all 4 appear OK.  Next, it's... turn up the variac &
> watch for the smoke.  It's only trepidation, accumulated from years &
> years of such practice, that keeps me from doing it today; So perhaps
> I'll first just sit & think about it for a while...
>
> Someone asked, after I reported my last failure (death of an IGBT
> brick), what might have caused it, and at the time I didn't
> know.  But while rebuilding the drivers, I discovered that I had
> positioned a wire-wrap pin, in one of the gate circuits, so that,
> when I fastened the board down above the mains capacitors, the pin
> pressed against one of the capacitor terminals--hidden from view, of
> course.  I didn't locate the source of the resultant smoke until I
> started rebuilding.
>
> As I've already reported, I utilize NPN/PNP emitter-follower
> driver-pairs for each of the 4 H-bridge IGBTs, transformer-driven,
> with the 4 transformer signals always applied (from my "pilot
> oscillator")--and now rebuilt with opto-isolators acting to gate-on
> drive to the NPNs during the spark-event times.  That way, all 4 gate
> voltages are kept at -28 or so between sparks by the continuous drive
> from the PNPs.  As before, the continuous transformer signal also
> serves to keep the + and - drive-supply electrolytics charged up.
>
> So stay tuned, so to speak--& don't be startled by smoke seen coming
> from the vicinity of California; it'll only be me once again.
>
> Ken Herrick
>
>
>
>
>