Re: Taming the SISG

["Tesla list" <tesla@xxxxxxxxxx>]

Original poster: Vardan <vardan01@xxxxxxxxxxxxxxxxxxxxxxx>

Hi Finn and All,

It probably does not matter now, but it might be a factor later on...

In the CT like array where there are many 
transformers around a stripped piece of RG-8 style coax.

http://home5.inet.tele.dk/f-hammer/TOTSISG.jpg

There is a chance (small) for arc through or 
capacitive noise to go past that layer.  A simple 
solution is to simply add a grounded layer in 
there to stop the capacitive coupling and act as 
a HV shield too.  Sort of like this with the DRSSTC current pickups:

http://drsstc.com/~terrell/pictures/CTshield.JPG

The grounded tube has no effect on the circuit, 
but it stops the HV RF coupling and noise 
dead.  Of course, the highest voltage CT must 
then still able to stand off the grounded tube 
too...  "tri-ax" type cable might be a nice choice too...

Just a thought,

Cheers,

        Terry


At 03:05 PM 11/14/2006, you wrote:
> All
>
> The SISG circuit caught my eyes immediately, and I liked it right off.
> The simplicity of the combined trigger/crowbar action appealed to me.
>
> One thing put me off, though: I was unable to 
> understand how the voltage doubler worked 
> (later, when Stephen C. had the nerve to admit 
> he didn`t either, Terry broke down and admitted 
> he didn`t understand it himself).
>
> Then of course there was the problem that it 
> worked like a static gap, which is not good if 
> the intent is to use DC resonant charging.
> I live in Europe, where 3-phase is the norm, so 
> fairly smooth DC is as plentifull as 6 pulse rectifiers.
>
> Therefore, some sort of trigger circuitry had to 
> be applied, and since I appeared to be the one 
> that wanted it the most, I became the first to 
> pick up the glove and try to design it.
>
> What I came up with was this:
>
> http://home5.inet.tele.dk/f-hammer/sttriggedsisg.jpeg
>
> This was heavily inspired by that 40somethingKV 
> SCR stack that I`m sure you all have seen 
> Alltronichs try to sell for years over at EBay.
> http://search.ebay.com/scr-stack_W0QQampsspagenameZhQ3ahQ3aadvsearchQ3aUSQQcatrefZC5QQfbdZ1QQfclZ3QQflocZ1QQfromZR6QQfrppZ50QQfsooZ1QQfsopZ1QQfssZ0QQftrtZ1QQftrvZ1QQnojsprZyQQpfidZ0QQsaaffZafdefaultQQsacatZQ2d1QQsacqyopZgeQQsacurZ0QQsadisZ200QQsargnZQ2d1QQsaslcZ0QQsaslopZ1QQsofocusZbs
> Of course I was worried that a SCR would not be 
> able to perform the task, but since the SIDAC´s 
> shouldn`t either (too high dI/dT) I gave it a go.
>
> The main reason for trying the gate 
> transformer/SCR solution, however, was this:
>
> Any drive circuitry would have to pass it`s 
> current down the gate drain resistor, and I 
> didn`t want to raise the gate voltage that much.
>
> So, transformer drive it was.
>
> I had selected the IR 25TTS12 1200V/16A SCR for 
> the job, and noted that it could be triggered by 
> 46mA @ 2Volts on the gate, so I figured that if 
> a gate transformer cold be made to deliver 2 
> volts into a 23ohm rsistor, I`d be on the right track.
>
> I bought a couple of cores, wound as many turns 
> on them as they would take in one layer, and 
> terminated the winding in 23ohms. Then I  passed 
> a wire trough them, and started experimentng 
> with discharging capacitors into the wire loop.
>
> I soon found out, that I also needed some zener 
> diodes to keep the voltage low enough, and that 
> the capacitance and voltage across it could be 
> much smaller than I had imagined.
> I ended up with 22µF charged to 16 volts. This 
> is then shorted into the trigger wire by a IR460 fet for 10µs.
> A more appropriate solution would be to build a 
> pulse forming network, maby I`l do that in the next iteration.
>
> I found out that the zeners were not needed when 
> the SCR was in connected to the transformer. by 
> then it was impossible to whack the gate higher than 1 volt.
>
> I already had a fiber optic transmitter from a 
> DRSSTC project, so the receiver on the trigger 
> board was used to pull the input pin on a 555 
> low trough a RC pulser, to create a 10µS pulse, 
> which in turn drives a ucc37722 driver chip, which switches the fet.
>
> This all worked all right in a 2 stage test 
> board, so I built a 10 stage board and applied some power.
>
> Since it still functions, I guess it is safe to 
> declare the design sound and fit for 
> replication, which I hereby invite you all to do.
>
> there are pictures of the SISG board here:
> http://home5.inet.tele.dk/f-hammer/TOTSISG.jpg
>
> and a bigger one of the SISG itself here:
> http://home5.inet.tele.dk/f-hammer/10KVSISG.jpg
>
> A video is here:
> http://drsstc.com/~piranha/PIRANHA/PIRANHA-2/FINN-SISG-MOV00628.MPG
> or here:
> http://www.sharebigfile.com/file/19656/MOV00628.mpg.html
>
> Cheers, Finn Hammer