RE: SSTC, Modes and soft switching

["Tesla list" <tesla-at-pupman-dot-com>]

Original poster: "Steve Conner" <steve.conner-at-optosci-dot-com> 

 >Really, without load and with an output waveform that grows only to
 >a limit and then starts to fall, soft switching is not possible.

I guess the corollary of this is, that if you force soft switching, the
output waveform must grow without limit :) I have observed this in
simulations and experiments. And it makes sense in theory too- if the
inverter voltage is held in phase with the primary current, then real power
must be leaving the inverter at all times- the flow can't reverse.

It really does happen, and is one of the things that makes DRSSTCs such
"fun" (the primary current grows without limit too)


 >The pll idea is conceptually elegant, but there is a problem:
 >How can the pll lock immediately, considering that the bursts are of
 >just a few cycles, and that the spacing between the zero crossings may
 >be not uniform? With any conventional pll, the first cycles would be
 >severely out of phase.

In the (relatively loose coupled) coils I've played with so far, the rate of
change of frequency is slow enough that the PLL can track it easily. The
rate of change of frequency seems to be a property of the coil system, not
the PLL.

I set the PLL up so its unlocked frequency is equal to the resonant
frequency of the primary alone. So it is practically in lock to start with.
I found experimentally that this setting gave the cleanest switching
overall. As the burst progresses I can see the frequency fall until it
reaches the lower split frequency. This is accompanied by a slight phase
error since the PLL needs an error signal to perform a frequency change.

Because of the loose coupling and small tank capacitance I have been using
bursts of around 50 cycles to get enough bang energy. I'm going to try
tighter coupled coils next and will report on how it goes.


 >It's possible then
 >to have all the energy in the system at the output capacitance after a
 >single input cycle.

The problem then is how to deliver a large amount of energy in such a short
time- it leads to immense peak currents in the transistors. The DRSSTCs
built so far use 10 to 30 cycles and peak currents of 200 to 1500A.


Steve C.