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Re: [TCML] DRSSTC ring-up

Hi Daniel,
> Do you have any pictures of your setup?
- Unfortunately there are no pictures of my setup. Primary is 5 turns AWG 8 on 3.55" dia 
form. Secondary is about 1000 turns AWG 32 on 3" dia form in a "standard 
arrangement".Topload is made of 2 small toroids.
The half bridge is "standard" as well:
GDT, bridged gate resistors and protection suppressors at the inputs. PP caps and 400 V 
TVSs at the output. The only "special" feature is the connection of the MMC to GND 
instead to the usual midpoint of 2 serialized capacitors across the rails.
I've tested this setup with a resistive load of 1 kW and rail voltages up to 400 V 

>  with only 75A peak and 57V on the bus, you're simply not developing enough voltage at
> the topload to break out properly. 
- So obviously I need to be more courageous.
> What IGBTs are you using
- IXGH48N60C3D1 (diode integrated), V ces = 600 V, t fi = 38 ns, I C25 = 75 A, I C for 1 
ms = 250 A

> absolute maximum pulse pulsed Ic-e as 180A, but are completely reliable up to 300A
> peak current in a DRSSTC. 
- That's an important info!
> A better way to test your coil might be to set your OCD less conservatively 
- Thank you very much for your advice. I'll give higher currents a chance.


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