It turns out my formula for determining maximum cycles was off by a factor of 2 for a half-bridge - meaning that it would apply for a full bridge. So I can actually run for twice the burst length that I thought without exceeding the primary capacitor voltage rating.
Vcap = (1/2 * Vbus) * ((2N)-1) for a half bridge, ignoring losses and transfers, where N = number of half cycles.
That is quite a nifty calculator program you have there! A bit all over the place as far as the GUI goes but I think I managed to figure it out with enough experimentation. I put my coil’s parameters in and came up with about 16 cycles burst length before VCa (primary cap’s voltage) gets too close to the rated voltage for comfort. The difference in projected primary circuit amplitude between your calculator and my formulae comes down to the fact that my calculations don't take into effect transferred power or loading or detuning. Mine aren’t meant to be an accurate model so much as a worst-case-scenario design guideline. After all, figuring out the necessary voltage rating for primary capacitor isn’t as straight forward for a DRSSTC as it is for a SGTC. Here’s a screenshot of my results: http://imageshack.com/a/img42/8379/a73d.jpg
That is quite strange behavior with the 1MHz noise, but good to hear that ferrite beads clear it up.
There’s significant explosion/fire hazard in overvolting the capacitor in a resonant system, do be careful!
About your (half) bridge; are you using Schottky isolation diodes and external freewheeling diodes to take the body diodes out of the circuit? I’ve found that they make tremendous differences in the longevity of the bridge and its ability to tolerate adverse conditions. While my site is intended for the SSTC, the bridge design and info there is solid for DRSSTCs and Induction Heaters as well, so I invite you to take a look. http://sigurthrenterprises.com/the-usstcc.html If you would like a GDT core suggestion one can also be found there in the BOM file for my USSTCC board. I’ve used this core to drive four FDL100N50F mosfets (about 60nF of total gate capacitance!).
-Matt Sig Giordano
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Why just 3 cycles? Would be mode 9:11:13. Requires tight coupling
(0.35). I think that streamers grow with successive burst too, if they
are not excessively spaced. I see this in my coil, with the streamer
length increasing clearly with the burst frequency (limited to about 200
Hz currently).
Some parasitic coupling in the wiring. A ferrite core around the output
cable almost eliminated it. The oscillations start after a burst, and
remain at full power until the next burst, when they sometimes stop
until the next burst. Very strange behavior.
I didn't measure the voltage over the primary capacitor yet, but the
simulations say that it is at safe level, at least in the no-breakout
condition, or with constant linear load. In the way I tune the system,
driving between the resonances, the input current does not grow with
burst length, above the designed ideal burst length that produces a
single beat in the current. In practice, as I have observed, It grows a
bit because the streamer loading detunes the system. One of the things
that I want to study with this coil is exactly what happens.
I have the exact expressions implemented in my drsstcd program, assuming
linearity at least.
http://www.coe.ufrj.br/~acmq/programs/drsstcd.zip
For awhile I have to rebuild the driver. After I managed so supress the
oscillations it stopped suddenly. An examination revealed a shorted
mosfet and the other leaking. I had installed two mosfets in parallel at
each leg of the half bridge, with one that could have the gate connected
to the gdt or to the source, so I could select using one or two mosfets.
My gdt, to be improved, was not good enough to drive two mosfets in
parallel, so I was using just one, with the other not conducting. The
last thing that I found today was that the inactive transistors were
also apparently damaged. Verifying tomorrow. The rebuild will include
some protective devices.
Antonio Carlos M. de Queiroz
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