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Re: [TCML] PFC capacitor topology



Hi Daniel, 

Upon considering your thoughts on PFC placement, I would surmise that the additional inductance introduced by the ballast would NOT corrected by option 2, because the ballast would then be upstream of the PFC. However, ultimately, the uncorrected higher current must be dealt with at the primary inductive load itself and the ‘buck stops’ at the input terminals of the transformer. Electrical utility companies spit up the capacitive VARs by placing their capacitor banks at intervals along their primary distribution circuits (in addition to larger capacitor banks at the substation). Usually, the capacitor banks along the circuit are switchable, so as to remove excessive leading power factor from the circuit when the inductive load is lower.
Power factor correction is always a balancing act between circuit L and C!

David
Memphis area (could use a little drying around here)

Sent from my iPhone

On Jan 4, 2019, at 11:39 AM, Daniel Kunkel <dankunkel@xxxxxxxxx> wrote:

>> The reduction in current draw is ONLY realized ‘upstream’ of the PFC
> 
> David,
> In that case I think option #2 would better since less current would move
> through the ballast. This would result in less heating. I'd also think you
> would be able to compensate for any phase angle changes introduced by the
> ballast itself.
> ~Dan
> Kansas City area (could use a little heating around here, actually)
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