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Re: Is a PLL-synchronised SR SSTC possible?



Original poster: "K. C. Herrick by way of Terry Fritz <teslalist-at-qwest-dot-net>" <kchdlh-at-juno-dot-com>

Jolyon (& all)-

Several people have proposed PLLs & the like for Fr synchronization.  As
I've commented on before on the List, it seems to me the simplest way is
the way I do it:

1.  Take the secondary's return current & feed it to ground via a
capacitor whose Xc is very low at Fr.  I use 1.5 uF for a 12" dia coil
with Fr of ~140 KHz.  Connect the small voltage across that capacitor via
1K ohms or so to grounded back-to-back diodes for clamping.  The diode
voltage is in phase/out of phase (depending on winding & amplification
polarities) with the excitation you will want to apply to the primary.

2.  Amplify the small diode voltage via sufficient linear gain, followed
by "digital" i.e. on-off gain, so that circuit noise will start the
primary driver's oscillation.  As soon as you gate it on, the amplifier
will synchronize with Fr, and it will stay synchronized, to instantaneous
Fr, thru the full spark event.  Alternatively, you could configure a
fully-on/off amplifying chain to constitute a weakly-controlled
free-running (and gated) oscillator at approximate Fr.  That oscillator's
feedback net would be configured so that, as soon as the secondary
started oscillating, its signal, from the clamp-diodes, would swamp the
weak feedback signal and synchronize the oscillator to the true Fr.  With
that latter scheme, you'd probably end up with fewer components in the
amplifying chain.

3.  The amplifying chain is to drive an untuned primary.

4.  What's created is just a large feedback-oscillator with the secondary
as the only resonant & frequency-controlling element.  Using this scheme,
you can, of course, swap secondaries with impunity: the system will
always tune itself, right away.

Ken Herrick
CA USA

On Sun, 23 Feb 2003 13:19:00 -0700 "Tesla list" <tesla-at-pupman-dot-com>
writes:
 > Original poster: "Jolyon Vater Cox by way of Terry Fritz
 > <teslalist-at-qwest-dot-net>" <jolyon-at-vatercox.freeserve.co.uk>
 >
 > I have drawn a diagram (below) for a self-resonant SSTC using a
 > Phase-Locked Loop
 > to synchronise oscillation of the VCO to the resonant frequency of
 > the
 > secondary. What if any are the reasons why this topology will not
 > work?
 >
 > Assuming that it could be made to work would a normal or a
 > quadrature phase
 > detector need to be employed/would the LM567 Tone Decoder IC be of
 > any use
 > in this application?
 >
 > Wouldn't the choice of quadrature or normal phase detector depend on
 > type
 > of feedback transducer used (eg pickup antenna, current transformer
 > or
 > current-sense resistor) and in the case of the current transformer
 > or
 > resistor, whether it was connected in series with the primary or the
 >
 > secondary windings?
 >
 > Isn't the technique I have illustrated basically a matter of simpy
 > frequency-modulating the oscillator to keep it in step with the
 > resonant
 > frequency?
 >
 > NB:or reasons of simplicity in the diagram, I have shown only a
 > SINGLE
 > transistor output stage.
 >
 > pickup antenna
 >        \|/
 >         |
 >   phase detector----low pass filter-+
 >         |                           |
 >         |                           |
 >         |                           |
 >         |         (-+-)             |
 >         |           |               |
 >         |   Vcc+   <                |
 >         |     |    <                |
 >         |  pri>    <sec             |
 >         |     >    <                |
 >         |     |    |               |
 > Contr. |   b /c    |               |
 > +--vco-+----|      |               |
 > |      O/P   \e    |               |
 > |            |     |               |
 > |            +-----+               |
 > |            gnd                   |
 > |                                  |
 > +----------------------------------+
 >
 > Jolyon
 >
 >
 >
 >
 >