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Re: Is a PLL-synchronised SR SSTC possible?



Original poster: "Jan Wagner by way of Terry Fritz <teslalist-at-qwest-dot-net>" <jwagner-at-cc.hut.fi>


On Sun, 23 Feb 2003, Tesla list wrote:
 > Original poster: "Jolyon Vater Cox by way of Terry Fritz 
<teslalist-at-qwest-dot-net>" <jolyon-at-vatercox.freeserve.co.uk>
 >
 > I have drawn a diagram (below) for a self-resonant SSTC using a
 > Phase-Locked Loop to synchronise oscillation of the VCO to the resonant
 > frequency of the  secondary. What if any are the reasons why this
 > topology will not work?

No reasons why it should not work, if designed carefully.

But the PLL scheme is a bit tough to get working, and as some already
pointed out, the performance gain you could get from it is not very
large. That is, unless you plan to build a rather high frequency SSTC, say
 >400kHz, where f_res changes kill the output quite fast in a
"conventional" PWM/fixed-freq oscillator setup.


 > Assuming that it could be made to work would a normal or a quadrature phase
 > detector need to be employed/would the LM567 Tone Decoder IC be of any use
 > in this application?

The 74HC4046 would give you more options on the phase comparator, it has
three. See datasheet - www.freetradezone-dot-com www.google-dot-com

Quadrature could be sufficient, but isn't it better to have more
alternatives to try out? ;)


some important points on PLL:

1) one problem with the digital PLL is the input/reference signal. The
phase comparators perform best when this signal is already converted to
have steep edges. A fast comparator could be one way to convert the TC
feedback signal into a good digital square wave even at low feedback
signal levels, as often present during a "out of tune" / "no lock"
condition. Depends on your design.


2) for obvious reasons, you'd want to restrict the PLL tracking freq
range, so that the TC harmonics are well outside this range and you don't
t.ex. land too close to the "early start" of 3/4 f_res, so that the minor
phase shift caused there would try to drive the PLL up, towards 3/4 f_res.
Then the PLL just hangs at its upper frequency bound forever...


 > Wouldn't the choice of quadrature or normal phase detector depend on type
 > of feedback transducer used (eg pickup antenna, current transformer or
 > current-sense resistor) and in the case of the current transformer or
 > resistor, whether it was connected in series with the primary or the
 > secondary windings?

True


 > Isn't the technique I have illustrated basically a matter of simpy
 > frequency-modulating the oscillator to keep it in step with the resonant
 > frequency?

Yes

"Simply" is a bit of an underestimate, tho... ;-)


A feedback signal over-amplification scheme is much simpler to design and
should work even slightly better than a PLL setup. Like the feedback setup
which maybe first was proposed by Ken Herrick and later adopted or
reinvented by others. Works with almost any secondary coils with no extra
adjustments, close to a true plug'n'play SSTC system.

The only drawback is that power modulation will be a bit more complex.
With a "few" extra logic parts you can do standard PWM, though, and still
have a self-resonant setup with no manual tuning. The same, if my thinking
goes correct, applies to the PLL setup too.

But with a <200kHz coil, if you want to do audio modulation, then the by
far simplest and very well performing setup (if you don't mind the tuning
knob, and hard-switched bridge transistors) still remains the single PWM
IC setup...


cheers,

  - jfw

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