Re: Is a PLL-synchronised SR SSTC possible?

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Original poster: "Jolyon Vater Cox by way of Terry Fritz <teslalist-at-qwest-dot-net>" <jolyon-at-vatercox.freeserve.co.uk>


----- Original Message -----
From: "Tesla list" <tesla-at-pupman-dot-com>
To: <tesla-at-pupman-dot-com>
Sent: Monday, February 24, 2003 6:48 PM
Subject: Re: Is a PLL-synchronised SR SSTC possible?


 > Original poster: "Jan Wagner by way of Terry Fritz <teslalist-at-qwest-dot-net>"
<jwagner-at-cc.hut.fi>
 >
 >
 > 2) for obvious reasons, you'd want to restrict the PLL tracking freq
 > range, so that the TC harmonics are well outside this range and you don't
 > t.ex. land too close to the "early start" of 3/4 f_res, so that the minor
 > phase shift caused there would try to drive the PLL up, towards 3/4 f_res.
 > Then the PLL just hangs at its upper frequency bound forever...
 >
Aren' t the 3/4 wave, 5/4 wave, 7/4 wave and subsequent series resonant
modes weaker in amplitude to the 1/4 wave mode?
Therefore, by "de-sensitising" the transducer to signals of less than a
certain amplitude, might it not be possible to preclude oscillation at
frequencies other than the quarter-wave mode?

Jolyon

 >