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[TCML] Re: Gate Drive Pictures

On Thu, May 6, 2021 at 11:51 PM shaun <snoggle@xxxxxxxxxxxxxx> wrote:
> The jacket has been removed from the cable and the wires twisted.

Did you leave the wires twisted as they were in the jacket? More
twisting can't hurt, but you want to keep each primary wire twisted
with its associated secondary wire. I think most people will use, for
example, the solid colors for secondaries, then parallel all the
striped colors for the primary. Reason is to keep mutual coupling high
while keeping leakage inductance low.

> With a 100Khz sig on the primary the square wave in and square wave out,
> looks good.
> Next test, one at 40khz and one at 60khz. The two pictures below are the
> results at the two frequencys

How are you driving the GDTs? With the UD driver, or with just a
signal generator? A signal generator may not be the best to drive a
GDT, certainly not with any sort of load attached.

> Why do I see most using the same number of turns and not having this
> problem, or maybe not showing it.

The best test would be to drive it with your intended driver at your
intended voltage at your intended frequency, then hook it up to your
intended IGBT with the appropriate resistors/tvs diodes. That's what I
typically do to verify GDT design.

> Also what would be the problem to just make a gdt with enough turns to avoid
> this problem.

It's a tradeoff. You want to minimize the number of turns to decrease
inductance (and leakage inductance as a result), but not too few turns
that you saturate the core. At the same time, you want to increase
turns to decrease magnetizing current.

This page describes this in more detail, and tells you how to
calculate magnetizing current, and if you click around there's lots of
other good info:

And I would note that most of the solid state coil discussion happens
on highvoltageforum.net these days. You might get more responses if
you post there. There are folks there that aren't active on TCML.

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