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Herrick's solid-state status



Original poster: "Kennan C Herrick by way of Terry Fritz <twftesla-at-uswest-dot-net>" <kcha1-at-juno-dot-com>

Very interesting postings today from Gary Johnson & Marco DeNicolai!

I add the following along the same vein about my s.s. system:

I've finally gotten my system to play properly.  Had to reconfigure the
MOSFET driving scheme considerably, redesign the pulse-burst gating
circuit and--solving today's little problem--realize that I had to use
only a National brand of 74HC240 IC in my signal circuit to avoid SCR
latch-up.

Per prior postings, I utilize my (patented) current-ring primary circuit.
 Presently it incorporates two equivalent primary turns rather than the
prior one.  Those turns are switched by 3 groups, of 6 pairs in each
group, of IRFP460LC MOSFETs; those transistors couple 3, 160VDC power
sources into the rings.  That yields a ring burst-current of some 225A. 
The current-ring conductors are just 18 ga. twisted-pair stranded "house
wire"; I provide 1 tw-pair, twice around the 12"-diameter ring per MOSFET
pair in a group, to yield 12, total, tw-pairs in the primary bundle.  The
12" x 52" secondary sits on top of that bundle; insulation is no problem
since the voltage to ground from anywhere in the rings, at any time, is
only about 160--the power supplys' capacitors being charged in parallel
directly off-line and being inductor-isolated during the pulse burst.

Since each MOSFET group carries all the ring current, each MOSFET pair
carries ~38A.  In the IRFP460LC, that will result in 20-50V Vds, which is
pretty much what I observe.  That, of course, subtracts from the voltage
I can apply to the 2 turns (3x that, in fact), thus diminishing the
primary current.  Also, at present 1 of the 160V power sources
incorporates only 6, 1000 uF capacitors rather than the 6, 1800 uF
capacitors in each of the other two.  Thus I get more decline in the
voltage provided by those, during the pulse burst, than I want.  My next
task is to configure the 1 spare circuit board I presently have with its
MOSFET-circuit components, add the cut-and-rewire drive modifications and
1800 uF capacitors, and then substitute it into the ring.

As soon as I can redesign the circuit boards for the new drive
configuration--and afford the cost of new boards, 18 more 1800 uF/250V
capacitors and 36 more MOSFETs, none of which are anywhere near cheap--I
will double up with a parallel current loop configuration so as to cut
down on the Vds.  Either that or substitute some better MOSFETs that are
now available.  As has been pointed out in the referenced postings, the
more power available the longer the spark; that means, more primary
ampere-turns.

I'm presently using the very elegant commercial 6" x 24" toroid recently
volume-purchased.  My (conducting) workshop ceiling is unfortunately too
low to allow for maximum performance indoors but I anticipate with the
present configuration a 3 ft. spark-length or so, at least, when I can
move the assembly to a more spacious area.

At present, spark breakout occurs (to the low ceiling) at 200 us after
beginning of pulse-burst.  That's ~20 cycles of the ~100 KHz resonant
frequency.  (As I've reported, I use a feedback system, deriving
excitation from the secondary return, to keep things always nicely in
tune.)  I have two means of controlling the pulse-burst duration:  First,
a counter counts 32 excitation cycles to provide a short period mostly
for testing purposes (the sparks are skinny).  Secondly, a front-panel
switch connects in a circuit that monitors average dc power-supply
voltage vs. peak line voltage and acts to establish the burst width as a
function of the difference between those two voltages (the power supplies
are current-limited switchers).  This provides for a sort of negative
feedback tending to regulate supply voltage as a function of pulse rate,
adjusting the burst width between ~3 and ~5 ms.

When I've fully adjusted and incorporated everything I'll be able to draw
upwards of 12-15A from my 120V power line with a full-duration spark rate
of perhaps 10/second.  With higher rates, the burst width, and the spark
length accordingly, will diminish. I'll not be able to run it
continuously at the higher rates without MOSFET forced-air cooling,
however--or, without the paralleled ring configuration I am looking
forward to. 

All this effort, just in time to suffer additionally and most cruelly
from our California power crisis.

...And it may well be that the old 19th century techniques that all the
rest of you employ will still give more impressive sparks.  Anyone near
Oakland, CA care to compare?

More later...

Ken Herrick
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