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Re: [TCML] Vce saturation voltage

Hehe this was my measurement. Current waveform was captured with Pearson
current transformer and inverter output voltage was captured with high
voltage differential probe. Sloping you see here is indeed voltage drop
over The C-E terminals but major part of it is actually caused by igbt
module infernal inductance and voltage drop over it. At high currents on
large modules (cm600 at 2.8kA) this voltage drop can be 100V or more.
On 12 Aug 2014 02:54, "Antonio Queiroz" <acmdequeiroz@xxxxxxxxx> wrote:

> Em 11/08/2014 07:45, Dorian Black via Tesla escreveu:
>> Hi,
>> I've noticed all my IGBT Vce on-voltages (and many I saw online) have a
>> slope-nature, going from some significant voltage at turn-on down to a
>> minimum at the end of the half-cycle. I find this hard to explain as with
>> zero-current switching that is the point where current is a minimum and
>> should hence yield a minimum Vce.
>> Here's a link to an image on 4hv forums that shows this:
>> http://4hv.org/e107_files/public/1383943659_599_FT144747_aaa.jpg
>>  It's necessary to see exactly how this waveform was measured to comment.
> Verify if there is something, a current transformer with excessive
> impedance for example, between the oscilloscope and the driver output. In a
> high-power setup even interference in the oscilloscope probes (induced
> voltage in series) may happen, and a large current may flow through the
> ground connection of the oscilloscope, affecting the mesurement.
> Antonio Carlos M. de Queiroz
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